New 2G Architecture Now Shipping!

D-TACQ's second generation Architecture builds on the basic simultaneous data acquisition concept, connecting the analog input array via a large Field Programmable Gate Array (FPGA *) to a modern XSCALE * microcontroller providing higher bandwidth, deeper memory and more software functionality. The architecture makes use of Xilinx V2PRO * and SPARTAN * FPGA * devices to provide the fastest data paths and most flexible data flows. Digitizers feature fully buffered differential simultaneous analog input channels; We realise that front end design is critical to overall performance. D-TACQ pays attention to detail to ensure best possible noise performance with lowest distortion. The intrinsically good cross talk performance of the ADC per channel architecture is further enhanced by careful layout. The high bandwidth and increased connectivity allows the transient recorder function to be extended to allow data streaming and realtime signal processing and event detection. High bandwidth - sustained 400MByte/sec data flow to memory. Up to 1GB DDR memory on board. 400MHz RISC processor, runs embedded Linux on board: excellent possibilities for added software functionality and connectivity. Dual gigabit ethernet option on high end boards, 100baseT on low end boards. Runs as traditional peripheral board, also capable of standalone and system slot functionality for reduced cost, space and power consumption. Possibility to use the FPGA * as a DSP co-processor. Input and output customisation via mezzanine. Multi board synchronisation using PXI * compatible signaling. Multiple clock routing options. The first 2G boards are in the 6U Compact PCI formfactor. They include ACQ216CPCI : 16 channel x 12 MSPS, 14 bit digitizer (8 x 22 MSPS, 4 x 50 MSPS options) WAV232CPCI: 32 channel Arbitrary Waveform Generator AWG ACQ196CPCI: 96 channel 500/250 kSPS, 16 bit digitiser (32, 64 channel options) Further products in both Compact PCI and regular PCI formfactors are planned.

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